Micro-display CMOS Backplane Architect
Job Summary
Job Description
- 6+ years CMOS IC design (display drivers, pixel arrays)
- 3+ years technical leadership
- Experience with circuit simulation tools (Cadence Spectre, Synopsys HSPICE)
- Deep knowledge of pixel architectures and driving schemes
- Define and architect CMOS backplane designs for micro-displays
- Master's or Ph.D. in Electrical Engineering
- Experience with digital design flows (Verilog, VHDL)
- Experience architecting CMOS backplanes for microdisplays (Micro-LED, OLED-on-Silicon, LCoS)
- Understanding of IC manufacturing processes
- Solid understanding of power management and low-power design techniques
- Bonus
- Equity
- Benefits
2 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Microelectronics, a related field, or equivalent practical experience.
- 6 years of experience in CMOS integrated circuit design focusing on display drivers, pixel arrays, or related mixed-signal ICs.
- 3 years of experience in technical leadership.
Preferred qualifications:
- Master's degree or Ph.D. in Electrical Engineering, Microelectronics, or a related field, with a strong background on integrated circuit design.
- Experience with circuit simulation tools (e.g., Cadence Spectre, Synopsys HSPICE) and digital design flows (e.g., Verilog, VHDL).
- Experience in architecting CMOS backplanes for microdisplays (Micro-LED, OLED-on-Silicon, LCoS).
- Deep knowledge of pixel architectures and driving schemes for active matrix displays.
- Understanding of IC manufacturing processes and their impact on design.
- Solid understanding of power management and low-power design techniques for integrated circuits, and familiarity with embedded memory architectures and their application in display backplanes.
About the job
Our Microdisplay Technology team is at the forefront of developing and commercializing next-generation microdisplay solutions for a variety of cutting-edge applications for Augmented Reality (AR) systems. We are committed to pushing the boundaries of display technology by designing and integrating high-performance CMOS backplanes with advanced emissive and/or reflective display technologies. Our mission is to deliver industry-leading microdisplays with exceptional resolution, brightness, efficiency, and form factors.
Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.
The US base salary range for this full-time position is $174,000-$258,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Define and architect innovative CMOS backplane designs for various micro-display technologies, considering resolution, refresh rate, brightness, contrast ratio, and power consumption, etc.
- Develop detailed specifications and block diagrams for the CMOS backplane architecture, including pixel circuitry, addressing schemes, data drivers, scan drivers, and control logic.
- Design and analyze critical analog and digital circuit blocks within the backplane, such as current sources, voltage references, amplifiers, shift registers, and memory elements.
- Optimize pixel design to enhance optical performance (e.g., high dynamic range, color accuracy) and minimize power consumption.
- Assess CMOS process technologies and design methodologies for microdisplay backplane development.
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